Event Snapshot: Huawei Unveils AI Compute Infrastructure at 2026 HUAWEI Connect
At Huawei Connect 2026 (September 17-19), Huawei launched a series of AI infrastructure products based on the Lingqu (UnifiedBus) interconnect architecture, including: -昇Teng 960 chip and hyper-node (wind-cooled launch Q2 2027, liquid-cooled Q3 2027)
- OceanStor M900 AI memory storage
- Kunpeng 950 hyper-node
- Star River UBG switch
- Atlas 650E dual-machine直连一体机 (supports local trillion-parameter model inference)
Key Technical Metrics: Single cluster supports 1 million AI chips; MFU (model floating-point utilization) for 100K-chip clusters improved from 20% to 35%; Lingqu achieves TB-level bandwidth and 2-microsecond RTT;昇Teng 960 hyper-node delivers up to 8 EFLOPS FP8, 1PB HBM capacity.
Breaking the Communication Wall: Lingqu Addresses Three Critical Pain Points
Traditional PCIe + RoCE Interconnect faces severe limitations in the Agentic AI era: model parameters scaling toward 50 trillion and context lengths reaching tens of millions cause communication volume to grow quadratically. The surprise finding: current 100K-chip clusters achieve only ~20% MFU, far below practical requirements—communication time dominates as the performance bottleneck.
Lingqu reengineers the entire stack through unified protocol design:
- Protocol Convergence: Unifies CPU, NPU, DPU, DDR, SSD, NIC under single protocol; eliminates conversion overhead; achieves unified memory addressing across hyper-nodes
- Heterogeneous Collaboration: Computing/storage units互联 for balanced access; supports dynamic CPU/NPU ratio and PD separation
- Tiered Storage Pooling: HBM/DDR/SSD unified management; single-node bandwidth reaches 480GB/s
- Photoelectric Interconnect: Physical reach exceeds 200 meters; 4096-chip node saves 196km copper cable; single-port speed 1.6T, 280T full-optical per chassis
Industry analysts note prior optimization efforts focused on patching legacy protocols, while Lingqu represents a foundational rewrite of AI communication architecture.
Product Ecosystem: Full-Spectrum from Million-Chip Clusters to Desktop
Lingqu-powered hyper-node families span all scales:
- Large-Scale: Kunpeng 950 hyper-node: 12,288 CPU cores + 192TB per cabinet;昇Teng 960 hyper-node: 8 chips, 32 PFLOPS FP4, 17.9TB/s Lingqu bandwidth; UBG switch: 1024 Radix per chassis for million-chip expansion
- Mid-Scale: 4096-chip nodes: 56 compute cabinets + 14 Lingqu interconnect cabinets; 99.8% availability
- Lightweight: Atlas 650E dual-machine: 16 NPU Full-Mesh without switch; trillion-parameter inference +40% throughput at 10ms latency;平滑 enables small-hyper-node expansion with PD separation
Product Comparison Overview
| Product | Core Configuration | Performance/Capacity | Lingqu Interconnect Features |
|---|---|---|---|
| 昇Teng 960 Hyper-Node | 8昇Teng 960 NPUs/duration | 32 PFLOPS FP4 / 8 EFLOPS FP8 | 4096-chip unit / 17.9TB/s bandwidth |
| Kunpeng 950 Hyper-Node | 384 CPUs/duration / 12,288 per cabinet | 24,000TB memory pooling | >1.5M cores unified scheduling |
| OceanStor M900 | Tri-chip controller + ASU module | 64TB/ASU / 480GB/s per node | Global pool access with compute |
| Atlas 650E | Up to 8-chip / dual-machine 16 NPU | 10ms latency for trillion models | Switch-less Full-Mesh互联 |
Practical Guidance: Match Solutions to Use Cases
- Adopt Immediately: Vertical scenarios (power inspection, financial risk control) requiring local deployment can use Atlas 650E dual-package for rapid prototyping; cloud providers needing million-chip-scale inference should monitor the Q3 2027 liquid-cooled launch
- Wait and Evaluate: Small-scale deployments (≤4 chips) still favor cost-effective PCIEx solutions; FP4-precision training workflows require additional community support as 26 industry-specific operator libraries have been developed
In Conclusion
Huawei’s vertical integration of compute and communication enters a critical inflection point for Agentic AI—when model scale approaches physical limits, breaking the communication wall becomes essential to unlock computational potential.